| [in] | boardId | Target board index |
| [in] | dw_SequenceMode | Sequence mode :
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Bit 0 (Compatibility old drivers) : 0 -> Disabled, 1 -> Enabled
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0 -> Disabled, means that a word is present at the begining of each packet to tell which data are in the packet, this allows to only get Chronometer for example
-
1 -> Enabled, means that the data are coming related to an ADC.
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Bit 1 (Start/Stop gate) (The bit 31 is set to tell if gate is high or low)
-
0 -> Disabled, data are stored with gate but when the gate becomes low no interrupt are generated with the last data,
-
1 -> Enabled, data are stored with gate but when the gate becomes low an interrupt will be generated with the last data
|
| [in] | dw_Mask | Mask of channels to acquire
- Bit 0 : ADC0 Left
- Bit 1 : ADC0 Right
- Bit 2 : Chrono / Incremental counter 0
- Bit 3 : ADC1 Left
- Bit 4 : ADC1 Right
- Bit 5 : Chrono / Incremental counter 1
- Bit 6 : ADC2 Left
- Bit 7 : ADC2 Right
- Bit 8 : Chrono 2
- Bit 9 : ADC3 Left
- Bit 10 : ADC3 Right
- Bit 11 : Chrono 3
- Bit 12 : Digital inputs/outputs
- Bit 13 : Additional data (see SetAdditionalData function)
|
| [in] | dw_TriggerMask | (only one bit is selectable)
- Bit 0 : ADC0
- Bit 1 : ADC1
- Bit 2 : ADC2
- Bit 3 : ADC3
- Bit 4 ->11 : Rising edge digital inputs
- Bit 12->19 : Falling edge digital inputs
|
| [in] | dw_GateMask |
- Bit 0 : Digital input 4
- Bit 1 : Digital input 5
- Bit 2 : Digital input 6
- Bit 3 : Digital input 7
- Bit 4 : Chrono / Incremental counter 0
- Bit 5 : Chrono / Incremental counter 1
- Bit 6 : Chrono 2
- Bit 7 : Chrono 3
|
| [in] | dw_BufferSize | RAM buffer size on the board, must be a multiple of 4 (in Bytes) |
| [in] | dw_SizeToTransfer | Sequence size to transfer (in Bytes) |
| [in] | dw_CompareSize | Each time dw_CompareSize is acquired an interrupt is generated to read the data (in Bytes) |